<b>Our work on Quantum Circuit Mapping Based on Incremental and Parallel SAT Solving</a> has been accepted to <a href="http://satisfiability.org/SAT24/">SAT 2024</a>.</b> <br> We introduce a novel circuit mapping method by combining incremental and parallel solving for Boolean Satisfiability (SAT). We present an innovative SAT encoding for circuit mapping problems, which significantly improves solver-based mapping methods and provides a smooth trade-off between compilation quality and compilation time. <br> Authors: Jiong Yang, Yaroslav A. Kharkov, Yunong Shi, Marijn Heule, and Bruno Dutertre <br>